ASIC/SoC Functional Design Verification: A Comprehensive Guide to Technologies and Methodologies eBook

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About this eTextbook

This book describes in detail all required technologies and methodologies needed to create a comprehensive, functional design verification strategy and environment to tackle the toughest job of guaranteeing first-pass working silicon. The author first outlines all of the verification sub-fields at a high level, with just enough depth to allow an engineer to grasp the field before delving into its detail. He then describes in detail industry standard technologies such as UVM (Universal Verification Methodology), SVA (SystemVerilog Assertions), SFC (SystemVerilog Functional Coverage), CDV (Coverage Driven Verification), Low Power Verification (Unified Power Format UPF), AMS (Analog Mixed Signal) verification, Virtual Platform TLM2.0/ESL (Electronic System Level) methodology, Static Formal Verification, Logic Equivalency Check (LEC), Hardware Acceleration, Hardware Emulation, Hardware/Software Co-verification, Power Performance Area (PPA) analysis on a virtual platform, Reuse Methodology from Algorithm/ESL to RTL, and other overall methodologies.

Publication details

Author: Ashok B. Mehta
Publisher: Springer
eText ISBN: 9783319594187, 3319594184
Print ISBN: 9783319594170, 3319594176

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About this eTextbook

Publication details

Author: Ashok B. Mehta
Publisher: Springer
eText ISBN: 9783319594187, 3319594184
Print ISBN: 9783319594170, 3319594176

What you receive

A licensed digital edition of this title, supplied as PDF or EPUB. The format is set by the publisher, so email us the ISBN before ordering and we will confirm which one it is.
Delivered to the email address on your order as a secure download link, usually within minutes and always within 24 hours of payment.
Download links do not expire and there is no cap on re-downloads. Readable on any computer, tablet or phone, online or offline.
This is a digital edition. Nothing is printed, packed or posted, and there is no delivery charge.