About this eTextbook
As advances in technology and circuit design boost operating frequencies of microprocessors, DSPs and other fast chips, new design challenges continue to emerge. One of the major performance limitations in today's chip designs is clock skew, the uncertainty in arrival times between a pair of clocks. Increasing clock frequencies are forcing many engineers to rethink their timing budgets and to use skew-tolerant circuit techniques for both domino and static circuits.
While senior designers have long developed their own techniques for reducing the sequencing overhead of domino circuits, this knowledge has routinely been protected as trade secret and has rarely been shared. Skew-Tolerant Circuit Design presents a systematic way of achieving the same goal and puts it in the hands of all designers. This book clearly presents skew-tolerant techniques and shows how they address the challenges of clocking, latching, and clock skew.
It provides the practicing circuit designer with a clearly detailed tutorial and an insightful summary of the most recent literature on these critical clock skew issues.
Publication details
- Author: Harris, David
- Publisher: Morgan Kaufmann
- eText ISBN: 9781558606364, 9780080541266, 0080541267
- Print ISBN: 9781558606364, 155860636X
What you receive
- A licensed digital edition of this title, supplied as PDF or EPUB. The format is set by the publisher, so email us the ISBN before ordering and we will confirm which one it is.
- Delivered to the email address on your order as a secure download link, usually within minutes and always within 24 hours of payment.
- Download links do not expire and there is no cap on re-downloads. Readable on any computer, tablet or phone, online or offline.
- This is a digital edition. Nothing is printed, packed or posted, and there is no delivery charge.


